Then, the Entinostat in vivo device was annealed at 400°C in N2 ambient for 10 min. The N2 pressure was 5 SLM. The cross-point memories with different arrays of 1 × 1 to 10 × 10 were designed, and the memory device at the 1 × 1 position was measured in this study. Figure 1 shows a schematic view of our IrO x /GdO x /W cross-point memory device. Figure 2 shows the topography of the Gd2O3 and IrO x films, observed using atomic

force microscope (AFM). AFM images of two-dimensional (2D) format are shown in Figure 2a,c, and three-dimensional (3D) images are shown in Figure 2b,d. The root mean square (rms, R q) and average (R a) surface roughness are found to be 0.688 and 0.518 nm of the Gd2O3 film on Si substrate, while those values are found to be 1.29 and 1.03 nm of the IrO x film on Gd2O3/SiO2/Si substrate, respectively. For comparison, we have also studied the surface roughness of

W BE for the via-hole and cross-point memory devices. BAY 80-6946 The root mean square (R q) surface roughness of W BE for the via-hole and GF120918 price cross-point devices is found to be 1.35 and 4.21 nm, and the average surface roughness (R a) is found to be 1.05 and 3.35 nm, respectively [42]. It is observed that the surface roughness of W BE is higher than those of GdO x and IrO x , which might have great impact on W BE as well as improved resistive switching characteristics. Figure 1 Schematic view of IrO x /GdO x /W cross-point memory device. Positive bias is applied at the Casein kinase 1 TE, and BE was grounded during the measurement. Figure 2 AFM images of the films. GdO x film on SiO2/Si substrate in

(a) 2D and (b) 3D views. IrO x film on IrO x /GdO x /SiO2/Si stack in (c) 2D and (d) 3D views. Second, the via-hole devices were fabricated for comparison. The fabrication steps are as follows. The W metal as a BE was deposited by rf sputtering on SiO2 (200 nm)/Si wafers. In this device, the thickness of W layer was approximately 100 nm. To form the RRAM device, the SiO2 layer with a thickness of approximately 150 nm was deposited. Then, a small via-hole with an active area of 2 × 2 μm2 was designed using standard lithography. Photoresist (PR) was used to design the pattern and was opened at the active and TE regions. Then, the Gd2O3 film with a thickness of 15 nm was deposited. Finally, lift-off was performed to get the memory device. A schematic view of our IrO x /GdO x /W via-hole structure is shown in Figure 3. During electrical measurement of the memory devices, the BE was grounded and the sweeping bias was applied on the TE. Figure 3 Schematic view of resistive switching memory device in an IrO x /GdO x /W via-hole structure. Typical device size is 2 × 2 μm2. Results and discussion Figure 4a shows the HRTEM image of our memory device for the as-deposited Gd2O3 film.